Unit 1 The Microprocessor - MCQ

UNIT I – THE 8086 MICROPROCESSOR

  

 

1. The NMI pin should remain high for atleast.
   1.   2 Clock Cycles
   2.   4 Clock Cycles
   3.   3 Clock Cycles
   4.   1 Clock Cycles
2. Comparing the time T1 taken for fetching and execution of a single instruction on a pipelined CPU with time T2 taken for the same on a non-pipelined but identical CPU, then select one of the following options.
   1.   T1is T2 plus the time taken for the one instruction fetch cycle
   2.   T1<T2
   3.   T1>T2
   4.   T1=T2
3. The instruction MOV AX, [2500H] is an example of
   1.   Immediate Addressing Mode
   2.   Indirect Addressing Mode
   3.   Direct Addressing Mode
   4.   Register Addressing Mode
4. The assembler directive used at the beginning of a procedure is _________.
   1.   ENDP
   2.   PROC
   3.   ORG
   4.   PTR
5. How many address lines are in 8086 microprocessor?
   1.   16 lines
   2.   32 lines
   3.   18 lines
   4.   20 lines
6. Which of the following instruction is used to find 2's complement of a number?
   1.   CMP
   2.   CMC
   3.   NOT
   4.   NEG
7. The result of the instruction MOV AL, 56 H is to _______.
   1.   store 0100 0001 in AL
   2.   store 0101 0110 in AL
   3.   store 42H in AL
   4.   store 40H in AL
8. Which of the following instructions is an example for Immediate addressing mode?
   1.   MOV BX , [2000]
   2.   MOV AX , [SI]
   3.   MOV BX , 2000
   4.   MOV AX , BX
9. The instruction that is used for finding out the codes in case of code conversion problems is
   1.   XLAT
   2.   XOR
   3.   XCHG
   4.   JCXZ
10. The 8086 has a ________________.
    1.   8-bit data bus and 16-bit address bus
    2.   16-bit data bus and 16-bit address bus
    3.   8-bit data bus and 20-bit address bus
    4.   16-bit data bus and 20-bit address bus
11. The memory map of 8086 is _________.
    1.   000H to FFFH
    2.   00000H to FFFFFH
    3.   0000H to FFFFH
    4.   000000H to FFFFFFH
12. The directive that marks the end of an assembly language program is
    1.   ENDS & END
    2.   END
    3.   None of the Mentioned
    4.   ENDS
13. The interrupt for which the processor has the highest priority among all the external interrupts is
    1.   TRAP
    2.   INT
    3.   Keyboard Interrupts
    4.   NMI
14. The instruction MOV AX, 0005H belongs to the address mode
    1.   Immediate
    2.   Register
    3.   Direct
    4.   Register Relative
15. The directive that updates the location counter to the next even address while executing a series of instructions is.
    1.   EVNE
    2.   EQU
    3.   EVEN
    4.   EVN
16. The 20-bit physical address in 8086 microprocessor, when CS = 2345H and IP = 5000H is _______.
    1.   24450H
    2.   52345H
    3.   23450H
    4.   28450H
17. If the offset of the operand is stored in one of the index registers, then it is
    1.   None of the Mentioned
    2.   Relative Based Indexed Addressing Mode
    3.   Based Indexed Addressing Mode
    4.   Indexed Addressing Mode
18. A machine language instruction format consists of
    1.   Operation Code Field
    2.   Operand Field
    3.   Operation Code Field & Operand Field
    4.   None of the Mentioned
19. The instructions which after execution transfer control to the next instruction in the sequence are called.
    1.   Control Transfer Instructions
    2.   Sequential Control Flow Instructions
    3.   None of the Mentioned
    4.   Sequential Control Flow & Control Transfer Instructions
20. The instructions that are used for reading an input port and writing an output port respectively are.
    1.   MOV, XCHG
    2.   IN, MOV
    3.   IN, OUT
    4.   MOV, IN
21. The status of the pending interrupts is checked at.
    1.   The end of each instruction cycle
    2.   The end of all the interrupts executed
    3.   The beginning of every interrupt
    4.   The end of main program
22. Operation code field is present in:
    1.   None of the Mentioned
    2.   Machine Language Instruction
    3.   Assembly Language Instruction
    4.   Programming Language Instruction
23. The instruction format register to register has a length of
    1.   4 Bytes
    2.   2 Bytes
    3.   1 Bytes
    4.   3 Bytes
24. Identify the values present in CS and IP after resetting the 8086?
    1.   CS= FFFFH and IP = 0000H
    2.   CS= FFFFH and IP = 1000H
    3.   Both contain 0000H
    4.   CS=1000 H and IP = 0000H
25. The 8086 Microprocessor can be operated in single mode when _________.
    1.   AF set
    2.   SF set
    3.   DF set
    4.   TF set
26. The instruction that supports additions when carry exists is
    1.   None of the Mentioned
    2.   ADD
    3.   ADD & ADC
    4.   ADC
27. The following instruction sequence will loop ________ number of times before coming out of the loop.
    MOV AL, 00H
    L1: INC AL
    JNZL1
    
    1.   01
    2.   256
    3.   255
    4.   00
28. Relate the following assembler directive that define the length of an array or string in bytes?
    1.   LOOK
    2.   LABEL
    3.   LENGTH
    4.   LOOP
29. Show which flag holds the carry after addition of bits in the bit position 3 of 8086 microprocessor
    1.   Auxiliary carry flag
    2.   Sign flag
    3.   Parity flag
    4.   Carry flag
30. If the CS register has the value 3000H and the IP register has the value 2000H, then Interpret the physical address to fetch the data?
    1.   32000H
    2.   38000H
    3.   34000H
    4.   36000H
31. Select the contents of the AL register after the following instructions have been executed?
    MOV BL,8C
    MOV AL,7E
    ADD AL,BL
    1.   6A and CARRY FLAG is SET
    2.   6A and CARRY FLAG is RESET
    3.   OA and CARRY FLAG is SET
    4.   OA and CARRY FLAG is RESET
32. The instruction “JUMP” belongs to
    1.   Branch Instructions
    2.   Control Transfer Instructions
    3.   Control Transfer & Branch Instructions
    4.   Sequential Control Flow Instructions
33. Which of the following as not a data copy / transfer instruction?
    1.   PUSH
    2.   POP
    3.   DAS
    4.   MOV
34. Name the default offset registers to access the data from stack segment register of 8086 microprocessor.
    1.   SP& BP
    2.   SI & DI
    3.   IP &BP
    4.   AX & BX
35. The instruction that is not possible among the following is
    1.   MOV [SI],[DI]
    2.   MOV AX, [BX]
    3.   MOV AX, [SI]
    4.   MOV AX, 5555H
36. In Push instruction, after each execution of the instruction, the stack pointer is
    1.   Incremented by 1
    2.   Decremented by 1
    3.   Incremented by 1
    4.   Decremented by 2
37. What does AAD instruction indicates in 8086 microprocessor?
    1.   ASCII-adjust before Division
    2.   ASCII-adjust after addition
    3.   ASCII-adjust after Division
    4.   ASCII-adjust after multiplication
38. Once the processor responds tom an INRT signal, the IF is automatically
    1.   Reset
    2.   Low
    3.   Set
    4.   High
39. Which of the following instruction is not valid?
    1.   MOV AX, BX
    2.   MOV AX, 5000H
    3.   MOV DS, 5000H
    4.   PUSH AX
40. The addressing mode that is used in unconditional branch instructions is
    1.   Inter Segment Direct Addressing Mode
    2.   Intra Segment Direct Addressing Mode
    3.   Intra Segment Direct and Indirect Addressing Mode
    4.   Intra Segment Indirect Addressing Mode